CIC-560 Multi-Function FPGA Training System


  • CIC-560 is equipped with ADC / DAC analog module, keyboard, LCDM display, PS2, VGA, UART, SCI interface, LED and 8-digit 7-segment LED display, DC motor, step motor driver circuits, and available for complex signal processor and digitalized control.
  • Suitable for the curriculum training in electronics, electrical engineering, information, communication and automation field.
  • Ideal for professional IC designers, R&D engineers, undergraduate and graduate students to learn IC design and software development.
  • Develop and verify basic and advanced digital circuit, digital signal processor and CPU / MCU with large-element and multi-pin CPLD/FPGA chip.

(1) Main System Chip
  • Main system chip on download board: ALTERA Cyclone EP1C12Q240C8
  • Download cable : USB Blaster
  • Flash memory 2MB for configuration

    (2) Modules
  • Power Supply
  • (a) 3.3V/3A
  • (b) 5V/3A

  • Inputs
  • (a) 4 sets of pushbutton for glitch de-bounce or non de-bounce
  • (b) Pushbutton trigger for toggle state
  • (c) 4 sets of 8-bit DIP switch
  • (d) 10 clock sets : 0.1 Hz, 1Hz, 10Hz, 100Hz, 1KHz,10KHz, 100KHz, 1MHz, 10MHz, 40MHz
  • (e) 44 matrix keyboard
  • (f) Infra-red interrupter as transceiver

  • Outputs
  • (a) 64 output buffer drive LED display
  • (b) 8 sets of 7-segment LED display located in two separate sets for respectively scan
  • (c) 128 x 64 LCD display (Graphic and Character)
  • (d) 8x8 color dot matrix
  • (e) Rotating encoder with A/B phase signal output (+3.3V/0V level)
  • (f) 16-segment display
  • (g) Speaker (8Ω / 0.5W)

  • Interfaces
  • (a) Infra-red interrupter as receiver
  • (b) PS/2 interface
  • (c) VGA interface with 8x8x8 bits color
  • (d) RS-232 interface

  • Motor Driver Interface Module
  • (a) Step motor driver, each drive 60V/500mA output
  • (b) Step motor : 12V/200mA , 7.5 degree/step
  • (c) 4 stage bridge PWM driver, each drive 50V/3A output for forward/reverse and dead band control

  • Expansion Modules
  • (a) 8-bit D/A
  • (b) 8-bit A/D
  • (c) Serial IIC interface for 256K bits SEEPROM
  • (d) Serial SPI interface, dual DAC (12-bit) module
  • (e) Single chip 89C51 interface
  • (f) One 40-pin connector and two 20-pin connectors to link FPGA for signal I/O in NIOS II system to expand memory mapping interface

    List of Experiment
  • Basic Logic Design and Application Experiment
  • Digital IC Design and Application Experiment
  • Advanced Digital IC Design for Communication, Industrial Control and MCU Interface Application Experiment
  • Micro Controller Units (MCU) and Expansion Interface Design and Application
  • SOPC and NIOS II Design and Application
  • Additional pictures

    CPLD 84PIN


    CIC-500 DSP Development and Experiment System


    Instruments Techno Test inc.

    Instruments Techno Test inc.
    2345, Michelin street, #100
    Laval, Qc
    H7L 5B9

    Téléphone : (450) 681-5777
    Télécopieur : (450) 681-3773

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